Voltage and Technology Scaling of DMTJ-based STT-MRAMs for Energy-Efficient Embedded Memories
Résumé
This work presents the energy advantages allowed by the technology and voltage scaling of spin-transfer torque magnetic random access memories (STT-MRAMs) based on perpendicular double-barrier magnetic tunnel junction (DMTJ), with two reference layers. DMTJ is benchmarked against the single-barrier MTJ (SMTJ) based alternative, and a comprehensive evaluation is carried out through a cross-layer simulation framework, considering a state-of-the-art Verilog-A based SMTJ and DMTJ compact models, along with a 0.8 V FinFET technology. Simulation results show that thanks to the lower voltage operating point, DMTJ-based STT-MRAM allows energy savings for write/read operations of about 38%/45%, as compared to its SMTJ-based counterpart. Moreover, scaling from the 28 nm down to the 20 nm node, the DMTJ-based offers improvements in terms of write/read energy of about 29%/33% at the expense of longer access times.
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