Interface engineering for vanadium dioxide (VO2) integration on silicon - Archive ouverte HAL
Communication Dans Un Congrès Année : 2022

Interface engineering for vanadium dioxide (VO2) integration on silicon

Résumé

Neuromorphic computing is being seen as a solution to address the memory bottleneck persistent with the present computing paradigm. To realize such an architecture, artificial synapses and neurons need to be built. One way to emulate a bio-synapse requires a material with an metal-insulator phase transition (MIT). VO2 undergoes a structural phase transformation (SPT) from monoclinic structure at room temperature to tetragonal at approximately 70°C. The SPT is accompanied by an IMT leading to a large variation in its electrical (about 4 orders of magnitude of its resistivity) and optical properties, in particular, in its complex refractive index in the mid-IR frequency range. To keep with the current trends of the microelectronic industry, it is imperative to integrate VO2 on silicon. However, the higher lattice mismatch and formation of oxides and silicates at the interface between VO2 and crystalline Si degrade the quality and functionality of VO2 film. Additionally, VO2(M1) is a challenging material to integrate into patterned heterostructures because it can exist not only as multiple polymorphs (A, B, M1) but the high-temperature depositions can lead to the formation of various oxidation states phases that are present in the V-O system (VnO2n-1, VnO2n+1). This work was conducted to study the growth of VO2 on silicon with oxide buffer layers using RF magnetron sputtering of a V2O5 ceramic target in argon atmosphere. We studied the structure-property relationships, specifically electrical and optical properties as a function of temperature across the Tc. Structural and compositional characterizations are carried out using x-ray diffraction, atomic force microscopy, and x-ray photoemission spectroscopy respectively, optical responses are studied under spectroscopic ellipsometry and electrical characterizations are performed using the four-point probe method. With the use of a very thin metal oxide buffer layer between the silicon substrate and VO2 film, we demonstrate a high resistivity ratio (of the order 3 between the two phases) and investigate the scope of improvement. The results show the influence of substrate temperature, VO2 grain size, and strain on it as well as the crystal structure of the buffer layer on the structural and physical properties of interfaces and film morphology which subsequently affect the electrical bistability of VO2. The preliminary findings mentioned here are being utilized to improve the electrical bistability, thus allowing us to improve the reproducibility in operational modes (switching, memory, logical operations, etc.) of neuromorphic devices.
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Dates et versions

hal-03792911 , version 1 (30-09-2022)

Identifiants

  • HAL Id : hal-03792911 , version 1

Citer

Swayam Sahoo, Alexandre Juneau-Fecteau, Anne Lamirand, Victor Pierron, Laurence Méchin, et al.. Interface engineering for vanadium dioxide (VO2) integration on silicon. European Materials Research Society(E-MRS) 2022 fall meeting, European Materials Research Society, Sep 2022, Warsaw, Poland. ⟨hal-03792911⟩
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