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Communication Dans Un Congrès Année : 2020

A universal spintronic technology based on Multifunctional Standardized Stack

Rajendra Bishnoi
Lionel Torres
Sophiane Senni
  • Fonction : Auteur
  • PersonId : 1045499
Guillaume Patrigeon
Pascal Benoit

Résumé

The goal of the GREAT RIA project is to cointegrate multiple functions like sensors ("Sensing"), RF emitters or receivers ("Communicating") and logic/memory ("Processing/Storing") together within CMOS technology by adapting the Spin-Transfer Torque Magnetic Tunnel Junction (STT-MTJ), elementary constitutive cell of the MRAM memories, to a single baseline technology. Based on the STT unique set of performances (non-volatility, high speed, infinite endurance and moderate read/write power), GREAT will achieve the same goal as heterogeneous integration of devices but in a much simpler way. This will lead to a unique STT-MTJ cell technology called Multifunctional Standardized Stack (MSS). This paper presents the lessons learned in the project from the technology, compact modeling, process design kit, standard cells, as well as memory and system level design evaluation and exploration. The proposed technology and toolsets are giant leaps towards heterogeneous integrated technology and architectures for IoT.
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Dates et versions

hal-03753403 , version 1 (26-08-2022)

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Mehdi Baradaran Tahoori, Sarath Mohanachandran Nair, Rajendra Bishnoi, Lionel Torres, Sophiane Senni, et al.. A universal spintronic technology based on Multifunctional Standardized Stack. DATE 2020 - 23rd Design, Automation and Test in Europe Conference and Exhibition, Mar 2020, Grenoble, France. pp.394-399, ⟨10.23919/DATE48585.2020.9116321⟩. ⟨hal-03753403⟩
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