Permanent damage induced by Channel Hot-Carrier (CHC) injections have been distinguished from the charge-discharge of near-interface traps in ultra-thin gate-oxide (1.6nm) MOSFETs. It is shown that usual DC accelerating techniques mostly devoted to CHC damage at large voltage conditions cannot be used alone for low supply voltage (VDD= 1V) MOSFETs. This arises from the charging of slow traps which induces a worst-case of damage which is relaxing in different ways depending on the discharging bias and cold phases. This is particularly more severe under hole injections in P-channel than under electron injections in N-Channel MOSFETs in relation to the smaller mobility of holes and to the gate-oxide nitridation which induces deep traps from the oxide valence band. The true effects of the distinct damage and relaxations are further analyzed using AC stresses which are required for the worst-case determination in advanced logic circuits. This is further evidenced by the determination of the effective quasi-static time factors dependent on the alternated damaging, discharging, and relaxing periods involved in ultra-thin gate-oxide MOSFETs operating at low voltage.