Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation:
Résumé
Practical and accurate Design-in Reliability methodology has been developed
for designs on 90-45nm technology to quantitatively assess the degradation
due to Hot Carrier and Negative Bias Temperature Instability. Simulation
capability has been built on top of an existing analog simulator ELDO. Circuits
are analyzed using this methodology illustrating the capabilities of the methodology
as well highlighting the impacts of the two degradation modes.