CNTFET design of a multiple-port ternary register file - Archive ouverte HAL
Article Dans Une Revue Microelectronics Journal Année : 2021

CNTFET design of a multiple-port ternary register file

Amr Mohammaden
  • Fonction : Auteur
Mohammed Fouda
Lobna Said
Ahmed Radwan
  • Fonction : Auteur

Résumé

Ternary number system offers higher information processing within the same number of digits when compared to binary systems. Such advantage motivated the development of ternary processing units especially with CNTFET which offers better power and delay results compared to CMOS-based realization. In this paper, we propose a variety of circuit realizations for the ternary memory elements that are needed in any processor including ternary D-latch, and ternary D-flip-flop. These basic building blocks are then used to design a ternary register file with multiple read and write ports. This paper is an attempt to investigate the performance aspects of using ternary RF to open the gate of more contributions and research in the direction of full ternary computer architecture. The proposed designs have been compared in terms of power, area, and latency at different supply voltages and operating temperatures.
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Dates et versions

hal-03557960 , version 1 (04-02-2022)

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Citer

Amr Mohammaden, Mohammed Fouda, Ihsen Alouani, Lobna Said, Ahmed Radwan. CNTFET design of a multiple-port ternary register file. Microelectronics Journal, 2021, 113, pp.105076. ⟨10.1016/j.mejo.2021.105076⟩. ⟨hal-03557960⟩
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