<?xml version="1.0" encoding="utf-8"?>
<TEI xmlns="http://www.tei-c.org/ns/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:hal="http://hal.archives-ouvertes.fr/" xmlns:gml="http://www.opengis.net/gml/3.3/" xmlns:gmlce="http://www.opengis.net/gml/3.3/ce" version="1.1" xsi:schemaLocation="http://www.tei-c.org/ns/1.0 http://api.archives-ouvertes.fr/documents/aofr-sword.xsd">
  <teiHeader>
    <fileDesc>
      <titleStmt>
        <title>HAL TEI export of hal-03487607</title>
      </titleStmt>
      <publicationStmt>
        <distributor>CCSD</distributor>
        <availability status="restricted">
          <licence target="https://creativecommons.org/publicdomain/zero/1.0/">CC0 1.0 - Universal</licence>
        </availability>
        <date when="2026-05-17T06:44:14+02:00"/>
      </publicationStmt>
      <sourceDesc>
        <p part="N">HAL API Platform</p>
      </sourceDesc>
    </fileDesc>
  </teiHeader>
  <text>
    <body>
      <listBibl>
        <biblFull>
          <titleStmt>
            <title xml:lang="en">Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support</title>
            <author role="aut">
              <persName>
                <forename type="first">Gabriel</forename>
                <surname>Busnot</surname>
              </persName>
              <idno type="idhal" notation="numeric">809716</idno>
              <idno type="halauthorid" notation="string">1526039-809716</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-8254-0355</idno>
              <affiliation ref="#struct-1071779"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Tanguy</forename>
                <surname>Sassolas</surname>
              </persName>
              <idno type="halauthorid">970198-0</idno>
              <affiliation ref="#struct-1071779"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Nicolas</forename>
                <surname>Ventroux</surname>
              </persName>
              <idno type="halauthorid">188535-0</idno>
              <affiliation ref="#struct-1071779"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Matthieu</forename>
                <surname>Moy</surname>
              </persName>
              <email type="md5">ea8b74cad876768eb3af64751e169c97</email>
              <email type="domain">univ-lyon1.fr</email>
              <idno type="idhal" notation="string">matthieu-moy</idno>
              <idno type="idhal" notation="numeric">1402</idno>
              <idno type="halauthorid" notation="string">5836-1402</idno>
              <idno type="IDREF">https://www.idref.fr/106984993</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-6054-8882</idno>
              <affiliation ref="#struct-35418"/>
              <affiliation ref="#struct-1096185"/>
            </author>
            <editor role="depositor">
              <persName>
                <forename>Matthieu</forename>
                <surname>Moy</surname>
              </persName>
              <email type="md5">ea8b74cad876768eb3af64751e169c97</email>
              <email type="domain">univ-lyon1.fr</email>
            </editor>
          </titleStmt>
          <editionStmt>
            <edition n="v1" type="current">
              <date type="whenSubmitted">2021-12-17 15:50:28</date>
              <date type="whenModified">2025-10-27 11:22:04</date>
              <date type="whenReleased">2021-12-17 17:09:35</date>
              <date type="whenProduced">2021-07</date>
              <date type="whenEndEmbargoed">2021-12-17</date>
              <ref type="file" target="https://hal.science/hal-03487607v1/document">
                <date notBefore="2021-12-17"/>
              </ref>
              <ref type="file" subtype="author" n="1" target="https://hal.science/hal-03487607v1/file/aspdac20-journal.pdf" id="file-3487607-3057122">
                <date notBefore="2021-12-17"/>
              </ref>
              <ref type="externalLink" target="https://hal.archives-ouvertes.fr/hal-03487607/document"/>
            </edition>
            <respStmt>
              <resp>contributor</resp>
              <name key="112391">
                <persName>
                  <forename>Matthieu</forename>
                  <surname>Moy</surname>
                </persName>
                <email type="md5">ea8b74cad876768eb3af64751e169c97</email>
                <email type="domain">univ-lyon1.fr</email>
              </name>
            </respStmt>
          </editionStmt>
          <publicationStmt>
            <distributor>CCSD</distributor>
            <idno type="halId">hal-03487607</idno>
            <idno type="halUri">https://hal.science/hal-03487607</idno>
            <idno type="halBibtex">busnot:hal-03487607</idno>
            <idno type="halRefHtml">&lt;i&gt;Integration, the VLSI Journal&lt;/i&gt;, 2021, 79, pp.23-40. &lt;a target="_blank" href="https://dx.doi.org/10.1016/j.vlsi.2020.12.006"&gt;&amp;#x27E8;10.1016/j.vlsi.2020.12.006&amp;#x27E9;&lt;/a&gt;</idno>
            <idno type="halRef">Integration, the VLSI Journal, 2021, 79, pp.23-40. &amp;#x27E8;10.1016/j.vlsi.2020.12.006&amp;#x27E9;</idno>
            <availability status="restricted">
              <licence target="https://about.hal.science/hal-authorisation-v1/">HAL Authorization<ref corresp="#file-3487607-3057122"/></licence>
            </availability>
          </publicationStmt>
          <seriesStmt>
            <idno type="stamp" n="ENS-LYON">École Normale Supérieure de Lyon</idno>
            <idno type="stamp" n="CEA">CEA - Commissariat à l'énergie atomique</idno>
            <idno type="stamp" n="CNRS">CNRS - Centre national de la recherche scientifique</idno>
            <idno type="stamp" n="INRIA">INRIA - Institut National de Recherche en Informatique et en Automatique</idno>
            <idno type="stamp" n="UNIV-LYON1">Université Claude Bernard - Lyon I</idno>
            <idno type="stamp" n="LIP" corresp="UNIV-LYON1">Laboratoire de l'Informatique du Parallélisme</idno>
            <idno type="stamp" n="DRT" corresp="CEA">Direction de la recherche technologique</idno>
            <idno type="stamp" n="INRIA2">INRIA 2</idno>
            <idno type="stamp" n="TDS-MACS">Réseau de recherche en Théorie des Systèmes Distribués, Modélisation, Analyse et Contrôle des Systèmes</idno>
            <idno type="stamp" n="LIST" corresp="CEA">Laboratoire d'Intégration des Systèmes et des Technologies</idno>
            <idno type="stamp" n="UDL">UDL</idno>
            <idno type="stamp" n="UNIV-LYON">Université de Lyon</idno>
            <idno type="stamp" n="TEST-HALCNRS">Collection test HAL CNRS</idno>
            <idno type="stamp" n="GS-COMPUTER-SCIENCE">Graduate School Computer Science</idno>
            <idno type="stamp" n="GS-SPORT-HUMAN-MOVEMENT">Graduate School Sport, Mouvement, Facteurs Humains</idno>
            <idno type="stamp" n="DSCIN" corresp="DRT">Département Systèmes et Circuits Intégrés Numériques</idno>
            <idno type="stamp" n="INRIA-LYS">INRIA-LYON</idno>
            <idno type="stamp" n="INRIAARTDOI">INRIAARTDOI</idno>
          </seriesStmt>
          <notesStmt>
            <note type="audience" n="2">International</note>
            <note type="popular" n="0">No</note>
            <note type="peer" n="1">Yes</note>
          </notesStmt>
          <sourceDesc>
            <biblStruct>
              <analytic>
                <title xml:lang="en">Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support</title>
                <author role="aut">
                  <persName>
                    <forename type="first">Gabriel</forename>
                    <surname>Busnot</surname>
                  </persName>
                  <idno type="idhal" notation="numeric">809716</idno>
                  <idno type="halauthorid" notation="string">1526039-809716</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-8254-0355</idno>
                  <affiliation ref="#struct-1071779"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Tanguy</forename>
                    <surname>Sassolas</surname>
                  </persName>
                  <idno type="halauthorid">970198-0</idno>
                  <affiliation ref="#struct-1071779"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Nicolas</forename>
                    <surname>Ventroux</surname>
                  </persName>
                  <idno type="halauthorid">188535-0</idno>
                  <affiliation ref="#struct-1071779"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Matthieu</forename>
                    <surname>Moy</surname>
                  </persName>
                  <email type="md5">ea8b74cad876768eb3af64751e169c97</email>
                  <email type="domain">univ-lyon1.fr</email>
                  <idno type="idhal" notation="string">matthieu-moy</idno>
                  <idno type="idhal" notation="numeric">1402</idno>
                  <idno type="halauthorid" notation="string">5836-1402</idno>
                  <idno type="IDREF">https://www.idref.fr/106984993</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-6054-8882</idno>
                  <affiliation ref="#struct-35418"/>
                  <affiliation ref="#struct-1096185"/>
                </author>
              </analytic>
              <monogr>
                <idno type="halJournalId" status="VALID">30713</idno>
                <idno type="issn">0167-9260</idno>
                <title level="j">Integration, the VLSI Journal</title>
                <imprint>
                  <publisher>Elsevier</publisher>
                  <biblScope unit="volume">79</biblScope>
                  <biblScope unit="pp">23-40</biblScope>
                  <date type="datePub">2021-07</date>
                </imprint>
              </monogr>
              <idno type="doi">10.1016/j.vlsi.2020.12.006</idno>
            </biblStruct>
          </sourceDesc>
          <profileDesc>
            <langUsage>
              <language ident="en">English</language>
            </langUsage>
            <textClass>
              <keywords scheme="author">
                <term xml:lang="en">SystemC</term>
                <term xml:lang="en">TLM 2.0</term>
                <term xml:lang="en">parallel simulation</term>
                <term xml:lang="en">rollback</term>
              </keywords>
              <classCode scheme="halDomain" n="info.info-mo">Computer Science [cs]/Modeling and Simulation</classCode>
              <classCode scheme="halDomain" n="info.info-dc">Computer Science [cs]/Distributed, Parallel, and Cluster Computing [cs.DC]</classCode>
              <classCode scheme="halDomain" n="info.info-es">Computer Science [cs]/Embedded Systems</classCode>
              <classCode scheme="halTypology" n="ART">Journal articles</classCode>
              <classCode scheme="halOldTypology" n="ART">Journal articles</classCode>
              <classCode scheme="halTreeTypology" n="ART">Journal articles</classCode>
            </textClass>
            <abstract xml:lang="en">
              <p>To face the growing complexity of System-on-Chips (SoCs) and their tight time-to-market constraints, Virtual Prototyping (VP) tools based on SystemC/TLM2.0 must get faster while maintaining accuracy. However, the ASI SystemC reference implementation remains sequential and cannot leverage the multiple cores of modern workstations. In this paper, we present SCale 2.0, a new implementation of a parallel and standard-compliant SystemC kernel, reaching unprecedented simulation speeds. By coupling a parallel SystemC kernel with shared resources access monitoring and process-level rollback, we can preserve SystemC atomic thread evaluation while leveraging the available host cores. We also generate process interaction traces that can be used to replay any simulation deterministically for debug purpose. Evaluation on baremetal applications shows ×15 speedup compared to the ASI SystemC kernel using 33 host cores reaching speeds above 2300 Million simulated Instructions Per Second (MIPS). Challenges related to parallel simulation of full software stack with modern operating systems are also addressed with speedup reaching ×13 during recording run and ×24 during the replay run.</p>
            </abstract>
          </profileDesc>
        </biblFull>
      </listBibl>
    </body>
    <back>
      <listOrg type="structures">
        <org type="department" xml:id="struct-1071779" status="VALID">
          <idno type="RNSR">202123738R</idno>
          <orgName>Département Systèmes et Circuits Intégrés Numériques</orgName>
          <orgName type="acronym">DSCIN (CEA, LIST)</orgName>
          <date type="start">2020-01-01</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
          </desc>
          <listRelation>
            <relation name="DRT/LIST/DSCIN" active="#struct-40217" type="direct"/>
            <relation name="DRT/LIST" active="#struct-440043" type="indirect"/>
            <relation name="DRT" active="#struct-300016" type="indirect"/>
          </listRelation>
        </org>
        <org type="laboratory" xml:id="struct-35418" status="VALID">
          <idno type="IdRef">191041289</idno>
          <idno type="ISNI">0000000104538607</idno>
          <idno type="RNSR">200317503S</idno>
          <idno type="ROR">04msnz457</idno>
          <orgName>Laboratoire de l'Informatique du Parallélisme</orgName>
          <orgName type="acronym">LIP</orgName>
          <date type="start">1990-01-01</date>
          <desc>
            <address>
              <addrLine>46 Allée d'Italie 69364 LYON CEDEX 07</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.ens-lyon.fr/LIP/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-6818" type="direct"/>
            <relation active="#struct-301088" type="direct"/>
            <relation active="#struct-194495" type="direct"/>
            <relation active="#struct-300009" type="direct"/>
            <relation name="UMR5668 / URA1398" active="#struct-441569" type="direct"/>
          </listRelation>
        </org>
        <org type="researchteam" xml:id="struct-1096185" status="VALID">
          <idno type="RNSR">201822804N</idno>
          <idno type="ROR">https://ror.org/03k192506</idno>
          <orgName>Compilation et Analyse, Logiciel et Matériel</orgName>
          <orgName type="acronym">CASH</orgName>
          <date type="start">2019-06-01</date>
          <date type="end">2025-12-31</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.ens-lyon.fr/LIP/CASH/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-35418" type="direct"/>
            <relation active="#struct-6818" type="indirect"/>
            <relation active="#struct-301088" type="indirect"/>
            <relation active="#struct-194495" type="indirect"/>
            <relation active="#struct-300009" type="indirect"/>
            <relation name="UMR5668 / URA1398" active="#struct-441569" type="indirect"/>
            <relation active="#struct-1096051" type="direct"/>
          </listRelation>
        </org>
        <org type="laboratory" xml:id="struct-40217" status="VALID">
          <idno type="IdRef">156836882</idno>
          <idno type="ISNI">0000 0004 0405 1788</idno>
          <idno type="RNSR">200118591H</idno>
          <idno type="ROR">https://ror.org/000dbcc61</idno>
          <idno type="Wikidata">Q30299467</idno>
          <orgName>Laboratoire d'Intégration des Systèmes et des Technologies</orgName>
          <orgName type="acronym">LIST (CEA)</orgName>
          <desc>
            <address>
              <addrLine>DRT/LISTNano-INNOVAvenue de la Vauve91120 Palaiseau</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www-list.cea.fr/</ref>
          </desc>
          <listRelation>
            <relation name="DRT/LIST" active="#struct-440043" type="direct"/>
            <relation name="DRT" active="#struct-300016" type="indirect"/>
          </listRelation>
        </org>
        <org type="regrouplaboratory" xml:id="struct-440043" status="VALID">
          <idno type="IdRef">067087930</idno>
          <idno type="ISNI">0000000121157881</idno>
          <idno type="RNSR">199018589D</idno>
          <idno type="ROR">https://ror.org/02ggzyd20</idno>
          <idno type="Wikidata">Q30299418</idno>
          <orgName>Direction de Recherche Technologique (CEA)</orgName>
          <orgName type="acronym">DRT (CEA)</orgName>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.drt-cea.com/</ref>
          </desc>
          <listRelation>
            <relation name="DRT" active="#struct-300016" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-300016" status="VALID">
          <idno type="IdRef">026372061</idno>
          <idno type="ISNI">0000000122998025</idno>
          <idno type="ROR">https://ror.org/00jjx8s55</idno>
          <idno type="Wikidata">Q868550</idno>
          <orgName>Commissariat à l'énergie atomique et aux énergies alternatives</orgName>
          <orgName type="acronym">CEA</orgName>
          <desc>
            <address>
              <addrLine>Centre de SaclayCentre de GrenobleCentre de Cadaracheetc</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.cea.fr/</ref>
          </desc>
        </org>
        <org type="institution" xml:id="struct-6818" status="VALID">
          <idno type="IdRef">149154992</idno>
          <idno type="ISNI">0000000123319856</idno>
          <idno type="ROR">https://ror.org/04zmssz18</idno>
          <idno type="Wikidata">Q10159</idno>
          <orgName>École normale supérieure de Lyon</orgName>
          <orgName type="acronym">ENS de Lyon</orgName>
          <date type="start">2010-01-01</date>
          <desc>
            <address>
              <addrLine>15 parvis René Descartes - BP 7000 - 69342 Lyon Cedex 07</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.ens-lyon.fr/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-301088" type="direct"/>
          </listRelation>
        </org>
        <org type="regroupinstitution" xml:id="struct-301088" status="VALID">
          <idno type="ROR">https://ror.org/01rk35k63</idno>
          <orgName>Université de Lyon</orgName>
          <desc>
            <address>
              <addrLine>92 rue Pasteur - CS 30122, 69361 Lyon Cedex 07</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.universite-lyon.fr/</ref>
          </desc>
        </org>
        <org type="institution" xml:id="struct-194495" status="VALID">
          <idno type="IdRef">026402823</idno>
          <idno type="ISNI">0000000121686185</idno>
          <idno type="ROR">https://ror.org/029brtt94</idno>
          <orgName>Université Claude Bernard Lyon 1</orgName>
          <orgName type="acronym">UCBL</orgName>
          <desc>
            <address>
              <addrLine>43, boulevard du 11 novembre 1918, 69622 Villeurbanne cedex</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.univ-lyon1.fr/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-301088" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-300009" status="VALID">
          <idno type="ROR">https://ror.org/02kvxyf05</idno>
          <orgName>Institut National de Recherche en Informatique et en Automatique</orgName>
          <orgName type="acronym">Inria</orgName>
          <desc>
            <address>
              <addrLine>Domaine de VoluceauRocquencourt - BP 10578153 Le Chesnay Cedex</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.inria.fr/en/</ref>
          </desc>
        </org>
        <org type="regroupinstitution" xml:id="struct-441569" status="VALID">
          <idno type="IdRef">02636817X</idno>
          <idno type="ISNI">0000000122597504</idno>
          <idno type="ROR">https://ror.org/02feahw73</idno>
          <orgName>Centre National de la Recherche Scientifique</orgName>
          <orgName type="acronym">CNRS</orgName>
          <date type="start">1939-10-19</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.cnrs.fr/</ref>
          </desc>
        </org>
        <org type="laboratory" xml:id="struct-1096051" status="VALID">
          <idno type="RNSR">202224236C</idno>
          <idno type="ROR">https://ror.org/022gakr41</idno>
          <orgName>Centre Inria de Lyon</orgName>
          <desc>
            <address>
              <addrLine>Inria de Lyon / Bâtiment CEI-2 / Campus La Doua - Villeurbanne / 56, Boulevard Niels Bohr / CS 52132 / 69 603 Villeurbanne</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.inria.fr/fr/centre-inria-de-lyon</ref>
          </desc>
          <listRelation>
            <relation active="#struct-300009" type="direct"/>
          </listRelation>
        </org>
      </listOrg>
    </back>
  </text>
</TEI>