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Communication Dans Un Congrès Année : 2021

Back gate impact on the noise performances of 22FDX fully-depleted SOI CMOS

Résumé

Ultra-Thin-Body and Back-oxide Fully-Depleted Silicon-On-Insulator (UTBB-FDSOI) MOSFETs are the most recent and advanced Silicon-On-Insulator (SOI) architecture proposed to overcome the down-scaling limitations of traditional bulk devices. The UTBB-FDSOI architecture has already been proved very attractive for RF-mmW circuits thanks to the excellent reported RF figure of merits (FOMs).In this article, we report on an experimental investigation of the back gate biasing impact on the high-frequency (HF) noise performances of an advanced 22 nm UTBB-FDSOI technology developed by GLOBALFOUNDRIES. For the lower gate voltages, the back gate biasing was shown to decrease by one third the equivalent noise resistance (Rn). Moreover, a 3 dB increase for the associated gain (Ga) was achieved at Vg=0.3V. A relaxed contacted-poly-pitch was also shown to decrease Rn by 11%.
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Dates et versions

hal-03462849 , version 1 (02-12-2021)

Identifiants

  • HAL Id : hal-03462849 , version 1
  • WOS : 000654861200021

Citer

Ousmane Magatte Kane, Luca Lucci, Pascal Scheiblin, Thierry Poiroux, Jean-Charles Barbé, et al.. Back gate impact on the noise performances of 22FDX fully-depleted SOI CMOS. 15th European Microwave Integrated Circuits Conference, EuMIC 2020, Jan 2021, Utrecht, Netherlands. 81-84, https://ieeexplore.ieee.org/abstract/document/9337333. ⟨hal-03462849⟩
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