Sub-0.3V CMOS neuromorphic technology and its potential application - Archive ouverte HAL
Communication Dans Un Congrès Année : 2021

Sub-0.3V CMOS neuromorphic technology and its potential application

Résumé

The aim of this paper is to present a sub-0.3 V neuromorphic technology developed for spiking neural network design and its potential application. The main properties of the developed ultra low power (ULP) artificial neuron are first recalled. A description of ULP synapses follows that includes the plasticity scheme. The neuromorphic toolbox is then used to design a basic circuit allowing oriented edges classification. The circuit is made of 40 neurons and 108 plastic synapses, its consumed silicon core area is 0.025 mm 2 and the overall power consumption of 5 nW. Finally, the deployment of the technology within an industrial context to fabricate highly energy efficient Spike-based visual sensor is discussed.
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Dates et versions

hal-03325599 , version 1 (10-08-2022)

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Francois Danneville, Kevin Carpentier, Ilias Sourikopoulos, Michel Paindavoine, Christophe Loyez. Sub-0.3V CMOS neuromorphic technology and its potential application. 2021 International Conference on Content-Based Multimedia Indexing (CBMI 2021), Jun 2021, Lille, France. ⟨10.1109/CBMI50038.2021.9461899⟩. ⟨hal-03325599⟩
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