V-shaped InAs/Al<sub>0.5</sub>Ga<sub>0.5</sub>Sb vertical tunnel FET on GaAs (001) substrate with I<sub>ON</sub>=433 µA.µm<sup>-1</sup> at V<sub>DS</sub>= 0.5V - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue IEEE Journal of the Electron Devices Society Année : 2017

V-shaped InAs/Al0.5Ga0.5Sb vertical tunnel FET on GaAs (001) substrate with ION=433 µA.µm-1 at VDS= 0.5V

Résumé

We report on the fabrication of a near broken InAs/Al0.5Ga0.5Sb vertical TFET. The epitaxial structure is grown on a GaAs (001) substrate thanks to large mismatch accommodation at the GaSb/GaAs interface. The fabrication process involves an anisotropic and selective wet chemical etching of the InAs channel to form a V-shaped mesa with lateral side gates. This new architecture provides a large ON-current at room temperature while enabling an efficient pinch-off thanks to a reduced body thickness near the tunneling interface. With low temperature measurements, we identify the different mechanisms limiting the subthreshold slope at room temperature. At 77K, where the impact of defects is reduced, a minimum subthreshold slope of 71 mV/decade is achieved for VDS=0.1V with an ION/IOFF current ratio larger than 6 decades demonstrating that a good trade-off between ON current and switching efficiency could be obtained with a near broken gap heterostructure based n-TFET.

Dates et versions

hal-03286175 , version 1 (13-07-2021)

Identifiants

Citer

Vinay Kumar Chinni, Mohammed Zaknoune, Christophe Coinon, Laurence Morgenroth, David Troadec, et al.. V-shaped InAs/Al0.5Ga0.5Sb vertical tunnel FET on GaAs (001) substrate with ION=433 µA.µm-1 at VDS= 0.5V. IEEE Journal of the Electron Devices Society, 2017, 5 (1), pp.53-58. ⟨10.1109/JEDS.2016.2630499⟩. ⟨hal-03286175⟩
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