A Measurement-based Performance Evaluation Framework for Neural Networks on MPSoCs
Abstract
Evaluation of performance for complex applications
such as Artificial Intelligence (AI) algorithms and more
specifically neural networks on Multi-Processor Systems on a
Chip (MPSoC) is tedious. Mechanisms such as data-dependent
paths and communication bus congestion induce execution time
variation, which is hard to predict accurately using traditional
analysis methods. This paper illustrates our proposed performance
prediction workflow based on simulation models for
probabilistic timing prediction for MPSoC. We aim to extend our
existing approach to optimize neural network implementation on
resource-constrained multiprocessor platforms.
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