A Temperature-Aware Framework on gm/ID-Based Methodology using 180 nm SOI from -40 ◦C to 200 ◦C - Archive ouverte HAL
Article Dans Une Revue IEEE Open Journal of Circuits and Systems Année : 2021

A Temperature-Aware Framework on gm/ID-Based Methodology using 180 nm SOI from -40 ◦C to 200 ◦C

Résumé

The advent of the Internet-of-Things brings new challenges in circuit design. The presence of circuits and sensors in harsh environments brought the need for methodologies that account for them. Since the beginning of the transistors, the temperature is known for having a significant impact on performance, and even though very low temperature sensitivity circuits have been proposed, no general methodology for designing them exists. This paper proposes a gm over Id technique for designing temperature-aware circuits that can be used either on measurement data, analytically, or based on simulation models. This model is validated using measurements up to 200°C of X-FAB XT018 transistors and later with a circuit design example.
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Dates et versions

hal-03176579 , version 1 (26-08-2022)

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João R. Raposo de O. Martins, Ali Mostafa, Jérôme Juillard, Rachid Hamani, Francisco De Oliveira Alves, et al.. A Temperature-Aware Framework on gm/ID-Based Methodology using 180 nm SOI from -40 ◦C to 200 ◦C. IEEE Open Journal of Circuits and Systems, 2021, 2, pp.311 - 322. ⟨10.1109/OJCAS.2021.3067377⟩. ⟨hal-03176579⟩
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