Towards Agile Hardware Designs with Chisel: a Network Use-case - Archive ouverte HAL Access content directly
Journal Articles IEEE Design & Test Year : 2021

Towards Agile Hardware Designs with Chisel: a Network Use-case

Jean Bruant
  • Function : Author
  • PersonId : 1077958
Olivier Muller
Tristan Groleat
  • Function : Author
  • PersonId : 957948
Frédéric Pétrot

Abstract

Facing Distributed Denial-of-Service (DDoS) attacks that are growing in both number and intensity, cloud service providers' network stability is at stake. Mitigation systems must provide highly responsive lines of defense while handling terabits per second. Combining reconfigurability with guaranteed throughput and latency, FPGAs are recognized targets for high-speed network applications. Although traditional hardware development flows struggle to be responsive, hardware construction languages (HCLs) bring new opportunities to hardware development. This article showcases how Chisel HCL unleashes the power of agile development methodologies through three successive development iterations of a hash-table, a core network processing module in OVHcloud mitigation systems.
Fichier principal
Vignette du fichier
bruant2021towards.pdf (317.37 Ko) Télécharger le fichier
Origin : Files produced by the author(s)

Dates and versions

hal-03157426 , version 1 (03-03-2021)

Identifiers

Cite

Jean Bruant, Pierre-Henri Horrein, Olivier Muller, Tristan Groleat, Frédéric Pétrot. Towards Agile Hardware Designs with Chisel: a Network Use-case. IEEE Design & Test, 2021, ⟨10.1109/MDAT.2021.3063339⟩. ⟨hal-03157426⟩
68 View
582 Download

Altmetric

Share

Gmail Facebook Twitter LinkedIn More