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Article dans une revue IEEE Transactions on Electron Devices Année : 2019

Extraction of packaged GaN power transistors parasitics using S-parameters

Résumé

In order to better predict the high-frequency switching operation of transistors in power converters, parasitic elements of these devices such as resistances, inductances, and capacitances must be accurately evaluated. This paper reports on the characterization of a gallium nitride (GaN) packaged power transistor using S-parameters in order to extract the device parasitics. Because the transistor is packaged, a calibration technique is carried out using specific test fixtures designed on FR4 printed circuit board (PCB) in order to get the S-parameters in the transistor plane from the measurement. The proposed method is suitable for a wide range of power devices. In this paper, it is applied to an enhancement-mode GaN high electron mobility transistor (HEMT). The impact of junction temperature on drain and source resistances is also evaluated. According to characterization results, equation-based modeling is proposed for the nonlinear parameters. The extracted parasitic elements are compared with reference values given by the device manufacturer.
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Dates et versions

hal-03140657, version 1 (14-03-2022)

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Loris Pace, N. Defrance, Arnaud Videt, N. Idir, Jean-Claude de Jaeger, et al.. Extraction of packaged GaN power transistors parasitics using S-parameters. IEEE Transactions on Electron Devices, 2019, 66 (6), pp.2583-2588. ⟨10.1109/TED.2019.2909152⟩. ⟨hal-03140657⟩
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