Recommendations for a radically secure ISA - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2020

Recommendations for a radically secure ISA

Résumé

The rising number of attacks targeting processors at micro-architecture level encourages more research on hardware level solutions. In this position paper, we specify a new RV32S “secure” instruction set architecture (ISA) derived from the RV32I RISC-V ISA. We propose modifications in the ISA to prevent timing side-channels, strengthen control flow integrity and ensure micro-architectural state isolation. The goal is to provide a new minimal hardware/software approach through which software attacks exploiting hardware vulnerabilities can be circumvented.
Fichier principal
Vignette du fichier
carrv.pdf (495.68 Ko) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)

Dates et versions

hal-03128242 , version 1 (05-02-2021)

Identifiants

  • HAL Id : hal-03128242 , version 1

Citer

Mathieu Escouteloup, Ronan Lashermes, Jean-Louis Lanet, Jacques Jean-Alain Fournier. Recommendations for a radically secure ISA. CARRV 2020 - Workshop on Computer Architecture Research with RISC-V, May 2020, Valence (virtual), Spain. pp.1-22. ⟨hal-03128242⟩
234 Consultations
347 Téléchargements

Partager

Gmail Mastodon Facebook X LinkedIn More