Silicon Test Structures Design for Sub-THz and THz Measurements
Résumé
In this paper, we present on-wafer TRL-calibrated measurements of silicon test structures fabricated using STMi-croelectronics' B55 technology up to 500 GHz. The structures are fabricated in two subsequent runs and the respective structure in each run has a different design. The improvements in the test structures layout design are presented on the terminal capaci-tances of "open-M1", which is an important test structure for the de-embedding of the transistor accesses. The improvements are examined using HFSS electromagnetic (EM) simulations, including the RF probe models and the neighboring structures.
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