The last years improvements of electronic circuits has allowed the appliance of digital systems in phase noise measurement techniques where low noise and high accuracy are required, yielding flexibility in the implementation and setup of measurement systems. By definition, any measure performed is always affected and limited by the noise of the measurement instrument itself. Considering that the Analog to Digital Converter (ADC) is the core and front end of digital systems, its residual noise has an important impact on the system performance. Consequently, the selection of the proper ADC becomes a critical issue for the system implementation. Currently, the information available in literature deeply describes the ADC features mainly at frequencies offsets far-from-carrier. Nevertheless for time and frequency applications the performance close to the carrier is an important concern as well. In this paper, a simple method for ADC characterization is proposed based on the Phase Locked Loop (PLL) definition and on Phase and Amplitude Modulation (PM/AM) measurements, focused in obtaining the relevant information of ADC noise contributions for phase noise measurement applications. The purpose of such a method is to find the parameters of a state ADC noise model using a technique which avoids the use of complex hardware and allows having a low computational costs performance.