Design and Modeling of 8-Bit Successive Approximation Analog to Digital Converter
Résumé
This paper presents a functional design and modeling of a successive approximation analog to digital converter(SAR ADC). The SAR ADC is described in VHDL-AMS behavior models and transistor level circuit netlists using the 0.13μm technology and supply voltage equals to 1.2V. The system was simulated using a signal commercial simulator.