Emerging non-volatile memory technologies open new perspectives for original computing architectures. Recent work have demonstrated the potential of flexible architectures that rely on power-gated distributed Magnetoresistive Random-Access Memory (MRAM). The proposed architecture uses a Network-on- Chip (NoC) to interconnect MRAM-based clusters and distribute application-specific commands to MRAM devices by means of packets. Configurable Network Interfaces allow to transform MRAM devices into smart units able to respond to incoming commands. With such an approach, the NoC becomes the energy bottleneck. In this paper we introduce a possible next step, which consists in optimising the NoC architecture by means of Wireless Links that provide Broadcast capabilities and reduce latency of multi-hop communications.