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Communication Dans Un Congrès Année : 2020

Real-time pattern recognition implementation on FPGA in multi-SNNs

Résumé

By mimicking or being inspired by the nervous system, Neuromorphic systems are designed to realize robust and power-efficient information processing by highly parallel architecture. Spike timing dependent plasticity (STDP) is a common method for training Spiking Neural Networks (SNNs) for pattern recognition. Here, we present a real-time STDP implementation on FPGA in SNN using digital spiking silicon neuron (DSSN) model. Equipped with Ethernet Interface, FPGA allows online configuration as well as data input and output all in real-time. We show that this STDP implementation can achieve pattern recognition task and the connection between multi-SNNs enlarge the scale of networks and application.

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Dates et versions

hal-02484022 , version 1 (19-02-2020)

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  • HAL Id : hal-02484022 , version 1

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Yang Xia, Timothée Levi, Takashi Kohno. Real-time pattern recognition implementation on FPGA in multi-SNNs. ICAROB, Jan 2020, Beppu, Japan. ⟨hal-02484022⟩
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