High Performance Heterostructure Barrier Varactors
Résumé
We report on the physics, fabrication technology and characterisation of high performance Heterostructure Barrier Varactors diodes. State-of-the art results in terms of capacitance ratios of up to 10:1 and voltage handling have recently been published for InP-and GaAs-based devices with a typical breakdown voltage as high as 6 V in a single barrier scheme for the former. On this basis, vertical and lateral stacking of eight barriers was demonstrated yielding a voltage handling of 50 V with a zero-bias capacitance of 250 aF/μm2. For tripler experiments integrated planar, devices were fabricated using e-beam patterning, RIE mesa etching and air-bridge techniques. Circular or finger-shaped devices, laterally integrated with a total of four barriers, demonstrate an output power of about 10 mW with a conversion efficiency of the order of 10% at 250 GHz. There are record results at the time of writing