Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures - Archive ouverte HAL Access content directly
Conference Papers Year : 2019

Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures

Abstract

Multi-core systems using ScratchPad Memories (SPMs) are attractive architectures for executing time-critical embedded applications, because they provide both predictability and performance. In this paper, we propose a scheduling technique that jointly selects SPM contents off-line, in such a way that the cost of SPM loading/unloading is hidden. Communications are fragmented to augment hiding possibilities. Experimental results show the effectiveness of the proposed technique on streaming applications and synthetic task-graphs. The overlapping of communications with computations allows the length of generated schedules to be reduced by 4% on average on streaming applications, with a maximum of 16%, and by 8% on average for synthetic task graphs. We further show on a case study that generated schedules can be implemented with low overhead on a predictable multi-core architecture (Kalray MPPA).
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Dates and versions

hal-02190271 , version 1 (22-07-2019)

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Benjamin Rouxel, Stefanos Skalistis, Steven Derrien, Isabelle Puaut. Hiding Communication Delays in Contention-Free Execution for SPM-Based Multi-Core Architectures. ECRTS 2019 - 31st Euromicro Conference on Real-Time Systems, Jul 2019, Stuttgart, Germany. pp.1-24, ⟨10.4230/LIPIcs.ECRTS.2019.25⟩. ⟨hal-02190271⟩
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