This paper presents the proof of concept of an almost full digital ASK demodulation technique, targeting the usage of advanced technology nodes, and hence reducing power consumption and area. High level Matlab simulations validate the functionality of the demodulator. The whole structure of this method uses two hysteresis comparators, one custom voltage level generator, two logical gates, a small delay block and a register. This technique allows the ASK demodulation with a minimum modulation index (MI) of 3%, a SNR of 28 dB and a bitrate of fc/4. When using higher MI values, the method is more sensitive and resistant to noise, reaching for example a BER = 0.15%, with a MI = 30%, and a SNR = 13 dB.