Subthreshold Drain current hysteresis of planar SiC MOSFETs - Archive ouverte HAL
Article Dans Une Revue Materials Science Forum Année : 2019

Subthreshold Drain current hysteresis of planar SiC MOSFETs

Résumé

VTH instabilities of SiC MOSFET are made of a permanent and a recoverable part. VTH hysteresis is a recoverable instability which affects the operation of the device since the threshold voltage depends on the negative bias applied previously, but is erased when the MOSFET is biased above the threshold voltage. In this paper, the phenomenon is assessed through experiments and TCAD simulation. The results are in good agreement and show that the VTH hysteresis is mainly caused by the hole trapping in the oxide near the interface. The C(V) characteristics of the measured device is similar to the simulated device having a concentration of 10e12 holes/cm2 trapped at the interface.
Fichier principal
Vignette du fichier
978-3-0357-1332-9_290.pdf (472.73 Ko) Télécharger le fichier
Origine Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-02060341 , version 1 (07-03-2019)

Identifiants

Citer

Besar Asllani, Alberto Castellazzi, Dominique Planson, Hervé Morel. Subthreshold Drain current hysteresis of planar SiC MOSFETs. Materials Science Forum, 2019, 963, pp.184-188. ⟨10.4028/www.scientific.net/MSF.963.184⟩. ⟨hal-02060341⟩
74 Consultations
225 Téléchargements

Altmetric

Partager

More