The time dependent defect spectroscopy method has been used to analyze the impact of low thermal budget (TB) processes on the quality of high-k/metal gate stacks. For n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), it is shown that reducing the TB of the process does not seem to degrade the t0-reliability of the gate oxide. The density of pre-existing high-k defects responsible for random telegraph noise (RTN) has a small increase for the low temperature (LT) process, and, at the same time, the location of the traps, inside the oxide, remains the same. On the other hand, for p-type MOSFETs, the gate stack reliability is affected by the thermal budget, and there is a large increase in the density of RTN defects for the LT process compared to the high temperature reference. Finally, it is observed that, for low thermal budget, the nature of the traps changes and there is a modification of the depth of the traps within the interfacial layer which are, now, closer to the Si interface. This study gives guidelines to achieve good trade off performance/reliability for a 3D CoolCube™ integration process.