Communication synthesis and HW/SW integration for embedded system design
Résumé
The implementation of codesign applications generally requires the use of heterogeneous resources (e.g., processor cores, hardware accelerators) in one system. Interfacing hardware and software components together and providing communications between them are particularly error prone and time consuming tasks. Hence, on the basis of a generic architecture we propose an extended communication synthesis method that provides characterization of communications and their implementation scheme in the target architecture. This method takes place after partitioning and scheduling and can constitute the basis of a back end of a codesign framework leading to HW/SW integration.
Mots clés
- Digital signal processing
- real-time systems
- protocols
- logic design
- logic partitioning
- systems analysis
- communication synthesis
- HW/SW integration
- embedded system design
- codesign applications
- Prototypes
- Concurrent computing
- heterogeneous resources
- Application software
- Signal synthesis
- Hardware
- Embedded system
- scheduling
- partitioning
- generic architecture
- Signal processing algorithms
- Computer architecture
- hardware accelerators
- processor cores