This article proposes procedures for the design and synthesis of wideband filter networks for integrated analog signal processing (ASP) applications. In this context, filters with engineered group delay are required. In the state-of-the-art of ASP, this is solved using discrete devices or system in package solutions like SAW filters. The proposal intends to generate network topologies compatible with an implementation in integrated circuit technologies. An example of the design and synthesis of doubly terminated ladder networks are presented to illustrate the proposal. The distortion on the group delay characteristic due to filter transformation is highlighted. It is also shown the trade-off between bandwidth and group delay swing. Finally, a synthesized network is sized for implementation in a 130 nm BiCMOS technology, and the results of its electrical simulation are compared with that of an ideal network.