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Communication Dans Un Congrès Année : 2018

A CMOS Envelope Detector for Low Power Wireless Receiver Applications

Résumé

Recent studies have shown that the power consumption of a wake-up receiver can be reduced by using an envelope detector as its first stage. Designing a low power envelope detector is challenging because of stringent requirements such as data rate, operating frequency, conversion gain and sensitivity. This paper describes the design of a 915 MHz envelope detector which uses a combination of active inductors and an input matching circuit to improve its conversion gain. The proposed design consumes 2 μA of bias current, achieves a 37.8 dB of conversion gain, a sensitivity of -60 dBm and a data rate of 200 kb/s in a 0.13 μm CMOS process.
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Dates et versions

hal-01789807 , version 1 (18-10-2022)

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Jack Ou, Pietro Maris Ferreira. A CMOS Envelope Detector for Low Power Wireless Receiver Applications. 2018 16th IEEE International New Circuits and Systems Conference (NEWCAS), Jun 2018, Montréal, Canada. ⟨10.1109/newcas.2018.8585458⟩. ⟨hal-01789807⟩
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