The introduction of VHDL in digital design practical courses
Résumé
This paper deals with the impact of the introduction of VHDL modelling into the VLSI design course taught at Télécom Bretagne. In particular, its effects on the progress of the design project proposed every year to the students are analysed. The advantages and drawbacks of the use of simulation and synthesis tools are explained.
Origine | Fichiers produits par l'(les) auteur(s) |
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