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Article Dans Une Revue Analog Integrated Circuits and Signal Processing Année : 2017

A self-duty-cycled 7.2-8.5 GHz IR-UWB receiver for low power and low data rate applications

Résumé

A self-duty-cycled non-coherent impulse radio-ultra wideband receiver targeted at low-power and low-data-rate applications is presented. The receiver is implemented in a 130 nm CMOS technology and works in the 7.2-8.5 GHz UWB band, which covers the IEEE 802.15.4a and 802.15.6 mandatories high-band channels. The receiver architecture is based on a non-coherent RF front-end (high gain LNA and pulse detector) followed by a synchronizer block (clock and data recovery or CDR function and window generation block), which enables to shut down the power-hungry LNA between pulses to strongly reduce the receiver power consumption. The main functions of the receiver, i.e. the RF front-end and the CDR block, were measured stand-alone. A maximum gain of 40 dB at 7.2 GHz is measured for the LNA. The RF front-end achieves a very low turn-on time (< 1 ns) and an average sensitivity of -92 dBm for a 10(-3) BER at a 1 Mbps data rate. A root-mean-square (RMS) jitter of 7.9 ns is measured for the CDR for a power consumption of 54 A mu W. Simulation results of the fully integrated self-duty-cycled 7.2-8.5 GHz IR-UWB receiver (that includes the measured main functions) confirm the expected performances. The synchronizer block consumes only 125 A mu W and the power consumption of the whole receiver is 1.8 mW for a 3% power duty-cycle (on-window of 30 ns).
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Dates et versions

hal-01694214 , version 1 (26-01-2018)

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Citer

Nicolas Dehaese, Ines Ben Amor, Ndiogou Tall, Jean Gaubert, Remy Vauche, et al.. A self-duty-cycled 7.2-8.5 GHz IR-UWB receiver for low power and low data rate applications. Analog Integrated Circuits and Signal Processing, 2017, 92 (1), pp.39-53. ⟨10.1007/s10470-017-0985-4⟩. ⟨hal-01694214⟩
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