Heuristic based Routing Algorithm for Network on Chip - Archive ouverte HAL
Communication Dans Un Congrès Année : 2016

Heuristic based Routing Algorithm for Network on Chip

Résumé

Deadlocks, livelock, congestion and faults are the four most important factors that reduce the NoC routing efficiency {[}1]. This paper proposes a new fully adaptive routing protocol for 2D-mesh NoC. It is inspired from the A-star search algorithm and called HRA (Heuristic based Routing Algorithm). The latter is distributed, congestion-aware and fault-tolerant by using only the local information of each router neighbors. HRA does not use VCs (Virtual Channels) but tries to reduce the risk of deadlock by avoiding the 2-nodes and the 4-nodes loops. Results show that HRA ensures a good reliability rate despite of the presence of many faulty links. In addition, it has interesting latencies values in different NoC sizes.
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Dates et versions

hal-01665376 , version 1 (15-12-2017)

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Citer

Asma Benmessaoud Gabis, Marc Sevaux, Pierre Bomel, Mouloud Koudil, Karima Benatchba. Heuristic based Routing Algorithm for Network on Chip. IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC), Sep 2016, Lyon, France. pp.39-45, ⟨10.1109/MCSoC.2016.43⟩. ⟨hal-01665376⟩
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