Reduced Complexity FPGA Implementation for UF-OFDM Frequency Domain Transmitter - Archive ouverte HAL
Communication Dans Un Congrès Année : 2017

Reduced Complexity FPGA Implementation for UF-OFDM Frequency Domain Transmitter

Résumé

Universal Filtered Orthogonal Frequency Division Multiplexing (UF-OFDM) is considered one of the main waveform candidates to overcome the challenges facing the next generation of mobile communication systems. Due to its spectral properties it can support relaxed synchronization, low-latency communications and flexible time transmission interval. Nevertheless, the available recent literature addresses the potential of this waveform mainly from communication performance perspective, and sometimes presents a rough estimation of the complexity. Therefore, it becomes high of interest to seek efficient hardware implementations. In this paper, a reduced complexity pipelined architecture is proposed for UF-OFDM frequency domain transmitter. Using LTE parameters, the proposed UFOFDM FDA architecture uses around 3.6 times less hardware ressources than the straightforward implementation.
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Dates et versions

hal-01656134 , version 1 (05-12-2017)

Identifiants

Citer

Saïd Medjkouh, Jérémy Nadal, Charbel Abdel Nour, Amer Baghdadi. Reduced Complexity FPGA Implementation for UF-OFDM Frequency Domain Transmitter. SIPS 2017: IEEE Workshop on Signal Processing Systems, Oct 2017, Lorient, France. pp.1 - 6, ⟨10.1109/SiPS.2017.8110013⟩. ⟨hal-01656134⟩
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