Accurate static timing analysis for deep submicronic CMOS circuits - Archive ouverte HAL
Communication Dans Un Congrès Année : 1997

Accurate static timing analysis for deep submicronic CMOS circuits

Résumé

This paper presents the performance of the static timing analyzer TAS for deep sub-micronic CMOS technologies. The methodology used by TAS is given with special emphasis on its Short Channel MOS model. Results are given to show the accuracy of the static timing analyzer TAS for various CMOS circuits (including pass transistor and precharge logic) as well as for various CMOS processes ranging from 1.2μ to 0.35μ. The Short Channel MOS model of TAS appears to be relevant to the analysis of deep submicronic processes.

Dates et versions

hal-01627845 , version 1 (02-11-2017)

Identifiants

Citer

Karim Dioury, Alain Greiner, Marie-Minerve Rosset-Louërat. Accurate static timing analysis for deep submicronic CMOS circuits. International Conference on Very Large Scale Integration (VLSI'97), Aug 1997, Gramado, Brazil. pp.439-450, ⟨10.1007/978-0-387-35311-1_36⟩. ⟨hal-01627845⟩
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