Extended-Forward Architecture for Simplified Check Node Processing in NB-LDPC Decoders - Archive ouverte HAL
Communication Dans Un Congrès Année : 2017

Extended-Forward Architecture for Simplified Check Node Processing in NB-LDPC Decoders

Résumé

This paper focuses on low complexity architectures for check node processing in Non-Binary LDPC decoders. To be specific, we focus on Extended Min-Sum decoders and consider the state-of-the-art Forward-Backward and Syndrome-Based approaches. We recall the presorting technique that allows for significant complexity reduction at the Elementary Check Node level. The Extended-Forward architecture is then presented as an original new architecture for efficient syndrome calculation. These advances lead to a new architecture for check node processing with reduced area. As an example, we provide implementation results over GF(64) and code rate 5/6 showing complexity reduction by a factor of up to 2.6.

Domaines

Electronique
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Dates et versions

hal-01613799 , version 1 (10-10-2017)

Identifiants

  • HAL Id : hal-01613799 , version 1

Citer

Cédric Marchand, Emmanuel Boutillon, Hassan Harb, Laura Conde-Canencia, Ali Al Ghouwayel. Extended-Forward Architecture for Simplified Check Node Processing in NB-LDPC Decoders. SIPS'2017, Oct 2017, Lorient, France. ⟨hal-01613799⟩
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