CAS-BUS: A Scalable and Reconfigurable Test Access Mechanism for Systems on a Chip
Résumé
This paper describes CAS-BUS, a P1500 compatible test access mechanism for systems on a chip. The TAM architecture is made up of a core access switch (CAS) and a test bus. The TAM characteristics are its flexibility, scalability and reconfigurability. A CAS generator has been developed, and some results are provided in the paper.