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Communication Dans Un Congrès Année : 2001

Systematic Design of High-Linearity Current-Mode Integrators for Low-Power Continuous-Time Sigma-Delta Modulators

Résumé

In this paper, the main sources of nonlinearity in current-mode continuous-time /spl Sigma//spl Delta/ modulators are analyzed. The first integrator gain of the current-mode integrator is optimized to improve the linearity of the /spl Sigma//spl Delta/ modulator. It is shown that by properly choosing the gain of the first integrator, harmonic distortion can be significantly reduced. A systematic design method for continuous-time /spl Sigma//spl Delta/ modulators is presented. This method has been used to design two third order continuous-time /spl Sigma//spl Delta/ modulators using 0.6 /spl mu/m and 0.18 /spl mu/m CMOS processes. Operating at a sampling frequency of 25.6 MHz, these modulators achieve 80 dB of SNDR for a 100 kHz input signal bandwidth.
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Dates et versions

hal-01572075 , version 1 (04-08-2017)

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Citer

Hassan Aboushady, Marie-Minerve Louërat. Systematic Design of High-Linearity Current-Mode Integrators for Low-Power Continuous-Time Sigma-Delta Modulators. IEEE International Conference on Electronic Circuits and Systems (ICECS'2001), Sep 2001, Malta, Malta. pp.963-966, ⟨10.1109/ICECS.2001.957633⟩. ⟨hal-01572075⟩
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