<?xml version="1.0" encoding="utf-8"?>
<TEI xmlns="http://www.tei-c.org/ns/1.0" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:hal="http://hal.archives-ouvertes.fr/" xmlns:gml="http://www.opengis.net/gml/3.3/" xmlns:gmlce="http://www.opengis.net/gml/3.3/ce" version="1.1" xsi:schemaLocation="http://www.tei-c.org/ns/1.0 http://api.archives-ouvertes.fr/documents/aofr-sword.xsd">
  <teiHeader>
    <fileDesc>
      <titleStmt>
        <title>HAL TEI export of hal-01447148</title>
      </titleStmt>
      <publicationStmt>
        <distributor>CCSD</distributor>
        <availability status="restricted">
          <licence target="https://creativecommons.org/publicdomain/zero/1.0/">CC0 1.0 - Universal</licence>
        </availability>
        <date when="2026-05-23T00:56:46+02:00"/>
      </publicationStmt>
      <sourceDesc>
        <p part="N">HAL API Platform</p>
      </sourceDesc>
    </fileDesc>
  </teiHeader>
  <text>
    <body>
      <listBibl>
        <biblFull>
          <titleStmt>
            <title xml:lang="en">Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design</title>
            <author role="aut">
              <persName>
                <forename type="first">Daniela</forename>
                <surname>Genius</surname>
              </persName>
              <email type="md5">fcfcf7d3c14762bced4f72273cef1c03</email>
              <email type="domain">lip6.fr</email>
              <idno type="idhal" notation="string">daniela-genius</idno>
              <idno type="idhal" notation="numeric">9489</idno>
              <idno type="halauthorid" notation="string">26785-9489</idno>
              <affiliation ref="#struct-398846"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Letitia</forename>
                <surname>Li</surname>
              </persName>
              <idno type="halauthorid">1058269-0</idno>
              <affiliation ref="#struct-265330"/>
            </author>
            <author role="aut">
              <persName>
                <forename type="first">Ludovic</forename>
                <surname>Apvrille</surname>
              </persName>
              <email type="md5">f55c34b34b2f2cf96c29da8419b55234</email>
              <email type="domain">telecom-paristech.fr</email>
              <idno type="idhal" notation="string">ludovic-apvrille</idno>
              <idno type="idhal" notation="numeric">178690</idno>
              <idno type="halauthorid" notation="string">29460-178690</idno>
              <idno type="ORCID">https://orcid.org/0000-0002-1167-4639</idno>
              <idno type="GOOGLE SCHOLAR">https://scholar.google.fr/citations?user=L3o8tgoAAAAJ&amp;hl=fr&amp;oi=ao</idno>
              <idno type="IDREF">https://www.idref.fr/061781614</idno>
              <affiliation ref="#struct-265330"/>
            </author>
            <editor role="depositor">
              <persName>
                <forename>Daniela</forename>
                <surname>Genius</surname>
              </persName>
              <email type="md5">fcfcf7d3c14762bced4f72273cef1c03</email>
              <email type="domain">lip6.fr</email>
            </editor>
          </titleStmt>
          <editionStmt>
            <edition n="v1" type="current">
              <date type="whenSubmitted">2017-02-23 14:13:31</date>
              <date type="whenModified">2025-02-20 17:56:06</date>
              <date type="whenReleased">2017-03-01 16:48:24</date>
              <date type="whenProduced">2017-02-19</date>
              <date type="whenEndEmbargoed">2017-02-23</date>
              <ref type="file" target="https://hal.sorbonne-universite.fr/hal-01447148v1/document">
                <date notBefore="2017-02-23"/>
              </ref>
              <ref type="file" subtype="author" n="1" target="https://hal.sorbonne-universite.fr/hal-01447148v1/file/ModelsWARD2017_Genius_Li_Apvrille.pdf" id="file-1475036-1546297">
                <date notBefore="2017-02-23"/>
              </ref>
            </edition>
            <respStmt>
              <resp>contributor</resp>
              <name key="77461">
                <persName>
                  <forename>Daniela</forename>
                  <surname>Genius</surname>
                </persName>
                <email type="md5">fcfcf7d3c14762bced4f72273cef1c03</email>
                <email type="domain">lip6.fr</email>
              </name>
            </respStmt>
          </editionStmt>
          <publicationStmt>
            <distributor>CCSD</distributor>
            <idno type="halId">hal-01447148</idno>
            <idno type="halUri">https://hal.sorbonne-universite.fr/hal-01447148</idno>
            <idno type="halBibtex">genius:hal-01447148</idno>
            <idno type="halRefHtml">&lt;i&gt;5th International Conference on Model-Driven Engineering and Software Development (MODELSWARD 2017)&lt;/i&gt;, INSTICC, Feb 2017, Porto, Portugal</idno>
            <idno type="halRef">5th International Conference on Model-Driven Engineering and Software Development (MODELSWARD 2017), INSTICC, Feb 2017, Porto, Portugal</idno>
            <availability status="restricted">
              <licence target="https://creativecommons.org/licenses/by/4.0/">CC BY 4.0 - Attribution<ref corresp="#file-1475036-1546297"/></licence>
            </availability>
          </publicationStmt>
          <seriesStmt>
            <idno type="stamp" n="UPMC" corresp="SORBONNE-UNIVERSITE">Université Pierre et Marie Curie</idno>
            <idno type="stamp" n="CNRS">CNRS - Centre national de la recherche scientifique</idno>
            <idno type="stamp" n="ENST">Ecole Nationale Supérieure des Télécommunications</idno>
            <idno type="stamp" n="TELECOM-PARISTECH" corresp="PARISTECH">Télécom Paris</idno>
            <idno type="stamp" n="PARISTECH">ParisTech</idno>
            <idno type="stamp" n="LIP6" corresp="SORBONNE-UNIVERSITE">Laboratoire d'Informatique de Paris 6</idno>
            <idno type="stamp" n="TELECOM-PARISTECH-SACLAY" corresp="PARISTECH">TELECOM-PARISTECH-SACLAY</idno>
            <idno type="stamp" n="UPMC_POLE_1" corresp="UPMC">UPMC Pôle 1</idno>
            <idno type="stamp" n="SORBONNE-UNIVERSITE">Sorbonne Université</idno>
            <idno type="stamp" n="LTCI" corresp="TELECOM-PARISTECH">Laboratoire Traitement et Communication de l'Information</idno>
            <idno type="stamp" n="LABSOC" corresp="TELECOM-PARISTECH">Equipe System on Chip</idno>
            <idno type="stamp" n="SU-SCIENCES" corresp="SORBONNE-UNIVERSITE">Faculté des Sciences de Sorbonne Université</idno>
            <idno type="stamp" n="INSTITUTS-TELECOM">composantes instituts telecom </idno>
            <idno type="stamp" n="SU-TI">Sorbonne Université - Texte Intégral</idno>
            <idno type="stamp" n="ALLIANCE-SU"> Alliance Sorbonne Université</idno>
            <idno type="stamp" n="INSTITUT-MINES-TELECOM">Institut Mines Telecom</idno>
          </seriesStmt>
          <notesStmt>
            <note type="commentary">(best paper award)</note>
            <note type="audience" n="2">International</note>
            <note type="invited" n="0">No</note>
            <note type="popular" n="0">No</note>
            <note type="peer" n="1">Yes</note>
            <note type="proceedings" n="1">Yes</note>
          </notesStmt>
          <sourceDesc>
            <biblStruct>
              <analytic>
                <title xml:lang="en">Model-Driven Performance Evaluation and Formal Verification for Multi-level Embedded System Design</title>
                <author role="aut">
                  <persName>
                    <forename type="first">Daniela</forename>
                    <surname>Genius</surname>
                  </persName>
                  <email type="md5">fcfcf7d3c14762bced4f72273cef1c03</email>
                  <email type="domain">lip6.fr</email>
                  <idno type="idhal" notation="string">daniela-genius</idno>
                  <idno type="idhal" notation="numeric">9489</idno>
                  <idno type="halauthorid" notation="string">26785-9489</idno>
                  <affiliation ref="#struct-398846"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Letitia</forename>
                    <surname>Li</surname>
                  </persName>
                  <idno type="halauthorid">1058269-0</idno>
                  <affiliation ref="#struct-265330"/>
                </author>
                <author role="aut">
                  <persName>
                    <forename type="first">Ludovic</forename>
                    <surname>Apvrille</surname>
                  </persName>
                  <email type="md5">f55c34b34b2f2cf96c29da8419b55234</email>
                  <email type="domain">telecom-paristech.fr</email>
                  <idno type="idhal" notation="string">ludovic-apvrille</idno>
                  <idno type="idhal" notation="numeric">178690</idno>
                  <idno type="halauthorid" notation="string">29460-178690</idno>
                  <idno type="ORCID">https://orcid.org/0000-0002-1167-4639</idno>
                  <idno type="GOOGLE SCHOLAR">https://scholar.google.fr/citations?user=L3o8tgoAAAAJ&amp;hl=fr&amp;oi=ao</idno>
                  <idno type="IDREF">https://www.idref.fr/061781614</idno>
                  <affiliation ref="#struct-265330"/>
                </author>
              </analytic>
              <monogr>
                <title level="m">Modeling Languages, Tools and Architectures, Methodologies, Processes and Platforms, Applications and Software Development (MODELSWARD)</title>
                <meeting>
                  <title>5th International Conference on Model-Driven Engineering and Software Development (MODELSWARD 2017)</title>
                  <date type="start">2017-02-19</date>
                  <date type="end">2017-02-21</date>
                  <settlement>Porto</settlement>
                  <country key="PT">Portugal</country>
                </meeting>
                <respStmt>
                  <resp>conferenceOrganizer</resp>
                  <name>INSTICC</name>
                </respStmt>
                <imprint>
                  <date type="datePub">2017</date>
                </imprint>
              </monogr>
              <ref type="publisher">http://www.modelsward.org/Home.aspx</ref>
            </biblStruct>
          </sourceDesc>
          <profileDesc>
            <langUsage>
              <language ident="en">English</language>
            </langUsage>
            <textClass>
              <keywords scheme="author">
                <term xml:lang="en">System-level design</term>
                <term xml:lang="en">Formal verification</term>
                <term xml:lang="en">Embedded systems</term>
                <term xml:lang="en">Virtual prototyping</term>
              </keywords>
              <classCode scheme="halDomain" n="info">Computer Science [cs]</classCode>
              <classCode scheme="halTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halOldTypology" n="COMM">Conference papers</classCode>
              <classCode scheme="halTreeTypology" n="COMM">Conference papers</classCode>
            </textClass>
            <abstract xml:lang="en">
              <p>The design methodology of an embedded system should start with a system-level partitioning dividing functions into hardware and software. However, since this partitioning decision is taken at a high level of abstraction, we propose regularly validating the selected partitioning during software development. The paper introduces a new model-based engineering process with a supporting toolkit, first performing system-level partitioning, and then assessing the partitioning choices thus obtained at different levels of abstraction during software design. This assessment shall in particular validate the assumptions made on system-level (e.g. on cache miss rates) that cannot be precisely determined without low-level hardware model. High-level partitioning simulations/verification rely on custom model-checkers and abstract models of software and hardware, while low-level prototyping simulations rely on automatically generated C-POSIX software code executing on a cycle-precise virtual prototyping platform. An automotive case study on an automatic braking applicationillustrates our complete approach.</p>
            </abstract>
          </profileDesc>
        </biblFull>
      </listBibl>
    </body>
    <back>
      <listOrg type="structures">
        <org type="researchteam" xml:id="struct-398846" status="OLD">
          <orgName>Architecture et Logiciels pour Systèmes Embarqués sur Puce</orgName>
          <orgName type="acronym">ALSOC</orgName>
          <date type="start">2004-01-01</date>
          <date type="end">2017-12-31</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
          </desc>
          <listRelation>
            <relation active="#struct-233" type="direct"/>
            <relation active="#struct-93591" type="indirect"/>
            <relation name="UMR7606" active="#struct-441569" type="indirect"/>
          </listRelation>
        </org>
        <org type="laboratory" xml:id="struct-265330" status="INCOMING">
          <orgName>Institut Mines-Telecom</orgName>
          <desc>
            <address>
              <addrLine>EURECOM, Campus SophiaTech, 450 route des Chappes, 06410 Biot Sophia Antipolis</addrLine>
              <country key="FR"/>
            </address>
          </desc>
          <listRelation>
            <relation active="#struct-300362" type="direct"/>
          </listRelation>
        </org>
        <org type="laboratory" xml:id="struct-233" status="OLD">
          <idno type="RNSR">199712651U</idno>
          <idno type="ROR">https://ror.org/05krcen59</idno>
          <orgName>Laboratoire d'Informatique de Paris 6</orgName>
          <orgName type="acronym">LIP6</orgName>
          <date type="start">1997-01-01</date>
          <date type="end">2017-12-31</date>
          <desc>
            <address>
              <addrLine>4 Place JUSSIEU 75252 PARIS CEDEX 05</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.lip6.fr/</ref>
          </desc>
          <listRelation>
            <relation active="#struct-93591" type="direct"/>
            <relation name="UMR7606" active="#struct-441569" type="direct"/>
          </listRelation>
        </org>
        <org type="institution" xml:id="struct-93591" status="OLD">
          <idno type="ROR">https://ror.org/02en5vm52</idno>
          <orgName>Université Pierre et Marie Curie - Paris 6</orgName>
          <orgName type="acronym">UPMC</orgName>
          <date type="end">2017-12-31</date>
          <desc>
            <address>
              <addrLine>4 place Jussieu - 75005 Paris</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">http://www.upmc.fr/</ref>
          </desc>
        </org>
        <org type="regroupinstitution" xml:id="struct-441569" status="VALID">
          <idno type="IdRef">02636817X</idno>
          <idno type="ISNI">0000000122597504</idno>
          <idno type="ROR">https://ror.org/02feahw73</idno>
          <orgName>Centre National de la Recherche Scientifique</orgName>
          <orgName type="acronym">CNRS</orgName>
          <date type="start">1939-10-19</date>
          <desc>
            <address>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.cnrs.fr/</ref>
          </desc>
        </org>
        <org type="institution" xml:id="struct-300362" status="VALID">
          <idno type="ROR">https://ror.org/01naq7912</idno>
          <orgName>Télécom ParisTech</orgName>
          <date type="start">2008-01-01</date>
          <date type="end">2019-06-11</date>
          <desc>
            <address>
              <addrLine>46 rue Barrault 75634 Paris Cedex 13</addrLine>
              <country key="FR"/>
            </address>
            <ref type="url">https://www.telecom-paris.fr</ref>
          </desc>
        </org>
      </listOrg>
    </back>
  </text>
</TEI>