This paper proposes a method for energy consumption estimation and optimisation on hardware-software embedded systems-on-chip. The starting point is an architectural description of the system used for simulation, that employs very abstract C-based models of the hardware components. We focus on the cycle-accurate level to improve the estimation accuracy. Behavioural models are extended with energy models that take into account the operations executed per transition into the state machine of the components. The method has been tested in a MPEG4 decoder implementation. The error of the energy estimations has been estimated lower than 6% from physical measurements. Low power techniques have been applied and analyzed like another memory hierarchy, clock gating, voltage/frequency scaling, and some others. They allow to reduce the consumption cost of the system in 93%.