The design methodology of an embedded system should start with a system-level design space exploration dividing functions into hardware and software. However, since this partitioning decision is taken at a high level of abstraction, we propose regularly validating the selected partitio ning during software development. The paper introduces a new model-based engineering process with a supporting toolkit TTool, first perfo rming system-level design space exploration, and then assessing these partitioning choices at different levels of abstraction during software design. Exploration and partitioning choices are verified using a press-button approach, enabling simulation and formal verification directly from SysML models. High-level simulations/verification rely on custom model-checkers and abstract models of software and hardware, while low-level simulations rely on automatically generated C-POSIX software code executing on a cycle-precise virtual prototyping platform. An automotive case study on an automatic braking application illustrates our complete approach.