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            <title xml:lang="en">A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications</title>
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            <idno type="halRefHtml">&lt;i&gt;4th Doctoral Conference on Computing, Electrical and Industrial Systems (DoCEIS)&lt;/i&gt;, Apr 2013, Costa de Caparica, Portugal. pp.441-448, &lt;a target="_blank" href="https://dx.doi.org/10.1007/978-3-642-37291-9_47"&gt;&amp;#x27E8;10.1007/978-3-642-37291-9_47&amp;#x27E9;&lt;/a&gt;</idno>
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                <title xml:lang="en">A Voltage Limiter Circuit for Indoor Light Energy Harvesting Applications</title>
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                <editor>Luis M. Camarinha-Matos</editor>
                <editor>Slavisa Tomic</editor>
                <editor>Paula Graça</editor>
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                <term xml:lang="en">Voltage reference circuits</term>
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                <term xml:lang="en">Energy harvesting</term>
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              <p>A voltage limiter circuit for indoor light energy harvesting applications is presented.This circuit is a part of a bigger system, whose function is to harvest indoor light energy, process it and store it, so that it can be used at a later time. This processing consists on maximum power point tracking (MPPT) and stepping-up, of the voltage from the photovoltaic (PV) harvester cell. The circuit here described, ensures that even under strong illumination, the generated voltage will not exceed the limit allowed by the technology, avoiding the degradation, or destruction, of the integrated die. A prototype of the limiter circuit was designed in a 130 nm CMOS technology. The layout of the circuit has a total area of 23414 μm2. Simulation results, using Spectre, are presented.</p>
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