Reliable GPS position on an unreliable hardware
Résumé
This paper address the fault tolerance topic in the GPS context. Starting from a noiseless GPS receiver, redundant mechanisms can be added to design a more resilient GPS receiver in the presence of errors due low supply voltage. An Application-specific integrated circuit (ASIC) will be designed, using the 28 nm technology, to compare theoretical results and measured results.
Domaines
Performance et fiabilité [cs.PF]Origine | Fichiers produits par l'(les) auteur(s) |
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