In this paper we present the language Stratus dedicated to the parametrized generation of VLSI modules. Stratus extends the Python language with a set of methods and functions for the procedural generation of netlist and layout views of structured cell based designs. It also provides a programming framework for the development of various optimization techniques that can be applied during module generation. From the designer's point of view, Stratus takes full advantage of Python: a portable, interpretative, easy to learn and object-oriented language. Stratus is the design capture component of the open-source academic physical synthesis platform Coriolis, based upon the Hurricane C++ integrated data-base, which provides both C++ and Python high level APIs. Stratus extends this Python API, and allows the designer to use both low level and high level placement, global routing and detailed routing directives.