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Article Dans Une Revue Journal of Signal Processing Systems Année : 2017

Embedded Real-Time H264/AVC High Definition Video Encoder on TI's KeyStone Multicore DSP

Résumé

To overcome high computational complexity of advanced video encoders for emerging applications that require real-time processing, multicore technology can be one of the promising solutions to meet this constraint. In this context, this paper presents a parallel implementation of the H264/ AVC high definition (HD) video encoder exploiting the power processing of eight-core digital signal processor (DSP) TMS320C6678. GOP Level Parallelism approach is used to improve the encoding speed and meet the real-time encoding compliant. A master core is reserved to handle data transfer between the DSP and the camera interface via a Gigabit Ethernet link. Multithreading algorithm and ping-pong buffers technique are used to enhance the classic GOP level parallel-ism approach and hide communication overhead. Experimental results on seven slave DSP cores, running each at 1 GHz, show that our implementation allows performing a real-time HD (1280 × 720) video encoding. The achieved encoding speed is up to 28 f/s. The proposed parallel implementation accelerates the encoding process by a factor of 6.7 without inducing quality degradation in terms of PSNR or bit-rate increase compared to single core implementation. Experiments show that our proposed scheduling technique for hiding communication overhead saves up to 36 % of the fully encoding chain time which includes frames capturing, frames encoding and bitstream saving in a file.
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Dates et versions

hal-01286949 , version 1 (24-05-2018)

Identifiants

Citer

Nejmeddine Bahri, Thierry Grandpierre, Med Ali Ben Ayed, Nouri Masmoudi, Mohamed Akil. Embedded Real-Time H264/AVC High Definition Video Encoder on TI's KeyStone Multicore DSP. Journal of Signal Processing Systems, 2017, 86 (1), pp.67-84. ⟨10.1007/s11265-015-1098-x⟩. ⟨hal-01286949⟩
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