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Communication Dans Un Congrès Année : 2013

Parallelization of Discrete Stochastic Arithmetic on multicore architectures

Résumé

Discrete Stochastic Arithmetic (DSA) estimates round-off error propagation in a program. It is based on a synchronous execution of several instances of the program to control using a random rounding mode. In this paper we show how we can take advantage of multicore processors, which are nowadays widespread, to reduce the cost of DSA in terms of execution time. Several processes execute in parallel different instances of the program and exchange data when necessary. Several strategies are compared for the estimation of the result accuracy and the detection of numerical instabilities. With our parallel implementation, the cost of DSA is reduced by a factor of about 2 compared with the sequential approach. Our parallel implementation of DSA has been used successfully for the numerical validation of a real-life application.
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Dates et versions

hal-01219739 , version 1 (23-10-2015)

Identifiants

Citer

Fabienne Jézéquel, Jean-Luc Lamotte, Olena Chubach. Parallelization of Discrete Stochastic Arithmetic on multicore architectures. 10th International Conference on Information Technology: New Generations, ITNG 2013, Apr 2013, Las Vegas, Nevada, United States. pp.160-166, ⟨10.1109/ITNG.2013.28⟩. ⟨hal-01219739⟩
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