Bit loading in mimo-plc systems with the presence of interference - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2015

Bit loading in mimo-plc systems with the presence of interference

Résumé

In broadband indoor power line communication (PLC) systems, multiple input multiple output (MIMO) techniques have been introduced to address the increasing demand for high data rates under the constraint of limited allocated bandwidth. Whereas the self inter-antenna interference can be dealt with on each subcarrier, both inter-carrier and inter-symbol interference can occur yielding sub-optimal bit loading if not considered. In this paper, we extend to the MIMO case the lowcomplexity bit/power allocation algorithm, called Reduced Complexity Algorithm (RCA), that we previously applied to the SISO case. Based on the Greedy principle, the RCA takes the interference into account to optimize the bit loading. We consider two MIMO schemes: optimum eigen beamforming and spatial multiplexing. Simulation results show the efficiency of the RCA in terms of throughput and computation cost in both cases.
Fichier principal
Vignette du fichier
Manuscript_EUSIPCO.pdf (255.1 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-01214333 , version 1 (13-10-2015)

Identifiants

  • HAL Id : hal-01214333 , version 1

Citer

Thanh Nhân Vo, Karine Amis Cavalec, Thierry Chonavel, Pierre Siohan. Bit loading in mimo-plc systems with the presence of interference. EUSIPCO 2015 : 23rd European Signal Processing Conference, Aug 2015, Nice, France. pp.904 - 908. ⟨hal-01214333⟩
271 Consultations
126 Téléchargements

Partager

Gmail Facebook X LinkedIn More