Modeling a spacewire architecture using timed automata to compute worst-case end-to-end delays - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2013

Modeling a spacewire architecture using timed automata to compute worst-case end-to-end delays

Résumé

Spacewire is a real-time communication network for use onboard satellites. It has been designed to transmit both payload and control/command data. To guarantee that communications respect the real-time constraints, designers use tools to compute the worst-case end-to-end delays. Among these tools, recursive flow analysis and Network Calculus approaches have been studied. This paper proposes to use the model-checking approach based on timed automata. A case study based on an industrial one is shown. Our approach is compared with recursive flow analysis and Network Calculus.
Fichier principal
Vignette du fichier
ermont_12792.pdf (142.84 Ko) Télécharger le fichier
Origine : Fichiers produits par l'(les) auteur(s)
Loading...

Dates et versions

hal-01212888 , version 1 (07-10-2015)

Identifiants

  • HAL Id : hal-01212888 , version 1
  • OATAO : 12792

Citer

Jérôme Ermont, Christian Fraboul. Modeling a spacewire architecture using timed automata to compute worst-case end-to-end delays. 18th IEEE Conference on Emerging Technologies & Factory Automation (ETFA 2013), Sep 2013, Cagliari, Italy. pp. 1-4. ⟨hal-01212888⟩
71 Consultations
110 Téléchargements

Partager

Gmail Facebook X LinkedIn More