Memory Management Optimization Problems for Integrated Circuit Simulators - Archive ouverte HAL Accéder directement au contenu
Article Dans Une Revue Discrete Applied Mathematics Année : 2007

Memory Management Optimization Problems for Integrated Circuit Simulators

Timothée Bossart
  • Fonction : Auteur
Francis Sourd
  • Fonction : Auteur
  • PersonId : 836436

Résumé

In hardware design, it is necessary to simulate the anticipated behavior of the integrated circuit before it is actually cast in silicon. As simulation procedures are long due to the great number of tests to be performed, optimization of the simulation code is of prime importance. This paper describes two mathematical models for the minimization of the memory access times for a cycle-based simulator. An integrated circuit being viewed as a directed acyclic graph, the problem consists in building a graph order on the vertices, compatible with the relation order induced by the graph, in order to minimize a cost function that represents the memory access time. For both proposed cost functions, we show that the corresponding problems are NP-complete. However, we show that the special cases where the graphs are in-trees or out-trees can be solved in polynomial time.

Dates et versions

hal-01185123 , version 1 (19-08-2015)

Identifiants

Citer

Timothée Bossart, Alix Munier-Kordon, Francis Sourd. Memory Management Optimization Problems for Integrated Circuit Simulators. Discrete Applied Mathematics, 2007, 155 (14), pp.1795-1811. ⟨10.1016/j.dam.2007.03.019⟩. ⟨hal-01185123⟩
103 Consultations
0 Téléchargements

Altmetric

Partager

Gmail Facebook X LinkedIn More