Design and Modeling of ADPLL with sliding-window for wide range frequency tracking
Résumé
An architecture of All-Digital Phase-Locked Loop (ADPLL) with sliding window for wide range frequency tracking is proposed to reduce energy consumption and to accelerate convergence. A synthesizable VHDL model is created for this circuit. Simulation and syntheses results demonstrate high performance of the new architecture.
Domaines
Electronique| Origine | Fichiers produits par l'(les) auteur(s) |
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