Fault-Tolerance Mechanisms for Permanent Failures in a Coherent Shared-Memory Many-Core Architecture
Résumé
Exponential augmentation on the transistor density in nowadays integrated circuits increases probability of faults. This work proposes an "On the field" fault-tolerance strategy for many-core processors allowing self-healing against permanent faults and therefore, increasing manufacturing yield and lifetime. Fault recovery is achieved by reusing of processor cores as test generators, test analyzers and reconfiguration drivers through the execution of embedded software procedures at every processor power-on or reset.
Domaines
Architectures Matérielles [cs.AR]Origine | Fichiers produits par l'(les) auteur(s) |
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