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Article Dans Une Revue Solid-State Electronics Année : 2013

DC and low frequency noise performances of SOI p-FinFETs at very low temperature

Résumé

In this paper, DC and noise measurements on strained and unstrained SOI p-FinFETs were performed at cryogenic temperatures (10 K) in order to evaluate the device performances and study the low frequency noise mechanisms. The main electrical parameters (threshold voltage, subthreshold swing, mobility, etc.) are investigated and compared to those found at 80 K and 300 K. The low frequency noise analysis clearly shows that from 300 K to 10 K, the carriers number fluctuation dominates the flicker noise in the channel in weak inversion, while the access resistances noise contribution prevails in strong inversion. 1/fc noise has been observed with c varying with the temperature, which implies a non-uniformity of the active trap density in the oxide depth. The noise of the access resistances at 300 K originates from mobility fluctuations, while at low temperature operation it seems to have a trapping-detrapping origin.
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Dates et versions

hal-00994180 , version 1 (22-08-2014)

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H. Achour, Rachida Talmat, Bogdan Cretu, Jean-Marc Routoure, A. Benfdila, et al.. DC and low frequency noise performances of SOI p-FinFETs at very low temperature. Solid-State Electronics, 2013, 90, pp.160-165. ⟨10.1016/j.sse.2013.06.006⟩. ⟨hal-00994180⟩
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